using System;

namespace RapidHDL
{
	/// <summary>
	/// Summary description for ComponentSharedData.
	/// </summary>
	public class ComponentSharedData
	{
		public int IdenticalVerilogWrittenCount;
		public int DifferentVerilogWrittenCount;

		public bool IsVerilogWritten;
		public bool IsGeneralStructureVerified;

		public System.Collections.ArrayList InputNodeVectors;
		public System.Collections.ArrayList OutputNodeVectors;
		public System.Collections.ArrayList ConnectionOnlyNodeVectors;
		public System.Collections.ArrayList RedundantNodeVectors;

		public ComponentSharedData()
		{
			IsVerilogWritten = false;
			IsGeneralStructureVerified = false;

			InputNodeVectors = new System.Collections.ArrayList();
			OutputNodeVectors = new System.Collections.ArrayList();
			ConnectionOnlyNodeVectors = new System.Collections.ArrayList();
			RedundantNodeVectors = new System.Collections.ArrayList();

			IdenticalVerilogWrittenCount = 0;
			DifferentVerilogWrittenCount = 0;
		}
	}
}
